In contrast to the Automated Test Equipment Mainframe (which, as its name suggests, was designed to allow multiple modules to be brought together to create a larger, interactive and programmable piece of test equipment), this bus more about building control systems out of standalone controllers and I/O modules in a master-slave configuration. The resulting control systems would typically be run autonomously, and be divided along (DIN) rail boundaries.
While this system still use a shared TTL-UART bus to allow controller modules to be queried and reprogrammed via a single USB-to-TTL serial interface, the bulk of the 'peripherals' — be they sensors, drivers or smaller, bare-bones microcontrollers — would likely be connected to the controller via an SPI bus to query, program and synchronise the various modules. To keep costs down, all modules, controllers and I/O boards alike, should be designed to support daisy-chaining.
Pin | Function | Pin | Function |
---|---|---|---|
1 (top) | +12V supply | 9 | GND |
2 | 10 | ||
3 | 11 | TxD | |
4 | +5V supply | 12 | RxD |
5 | 13 | SCL | |
6 | GND | 14 | SDA |
7 | 15 | /RESET | |
8 | 16 | (Reserved) |